Dual Active Bridge (DAB) : Operating Modes

The operating principle of single phase-shift control for dual active bridge converter is explained. The switching sequence of DAB converter is divided into 10 intervals based on the

• Inductor current waveform
• Phase-shift between the primary and secondary bridge voltages
• Dead-time between the leg switches.

Interval-1 (0 – t₁)

• The gate signals (S₁, S₂) and (Q₃, Q₄) are available. Hence, V_AB is positive and V_CD is negative.
• Since primary side V_AB is positive and i_L is negative, diodes (D_S1, D_S2) do conduct in primary side.
• Since secondary side both V_CD and i_L are negative, diodes (D_Q3, D_Q4) do conduct in secondary side.
• This stage ends when the inductor current i_L reaches zero from negative.

Interval-2 (t₁ – t₂)

• The gate signals (S₁, S₂) and (Q₃, Q₄) are still available. Hence, V_AB is positive and V_CD is negative.
• Since primary side V_AB and i_L are positive, switches (S₁, S₂) do conduct in primary side.
• Since secondary side V_CD is negative and i_L is positive, switches (Q₃, Q₄) do conduct in secondary side.
• This stage ends when the inductor current reaches a positive from zero.

Interval-3 (t₂ – t₃)

• The gate signals (S₁, S₂) are available and all switches in secondary are in off state. Hence, i_L is positive and V_CD is zero. This period can be called secondary bridge dead-band region.
• Since primary side both V_AB and i_L are positive, only switches (S₁, S₂) do conduct in primary side.
• Since secondary voltage is zero and i_L is positive, energy stored in inductor circulates in same direction, hence that discharges the switch capacitors  (C_Q1, C_Q2) to 0 (i.e. V_o -> 0) and charges the switch capacitors (C_Q3, C_Q4) to Vo (i.e. 0 -> V_o). Therefore, secondary voltage V_CD changes from -V_o -> +V_o.
• This stage ends when the inductor current charges and discharges the secondary bridge switch capacitors fully.

Interval-4 (t₃ – t₄)

• The gate signals (S₁, S₂) and (Q₁, Q₂) are available. Hence, V_AB is positive and V_CD is positive.

• Since primary side both V_AB and i_L are positive, switches (S₁, S₂) do conduct in primary side.
• Since secondary side both V_CD and i_L are positive, diodes (D_Q1, D_Q2) do conduct in secondary side.
• This stage ends when the primary bridge gating signals are removed.

Interval-5 (t₄ – t₅)

• The gate signals only (Q₁, Q₂) are available and all switches in primary are in off state. Hence, V_AB is zero and i_L is positive. This period can be called primary bridge dead-band region.
• Since primary voltage is zero and i_L is positive, energy stored inductor circulates in same direction, hence that discharges the switch capacitors (C_S3, C_S4) to 0 (i.e. V_s -> 0) and charges the capacitors (C_S1, C_S2) to Vs (i.e. 0 -> V_s). Therefore, primary voltage V_AB changes from +V_s -> -V_s.
• Since secondary side V_CD is positive and i_L is positive, only diodes (D_Q1, D_Q2) do conduct in secondary side.
• This stage ends when the inductor current charges and discharges the primary bridge switch capacitors fully.

Interval-6 (t₅ – t₆)

• The gate signals (S₃, S₄) and (Q₁, Q₂) are available. Hence, V_AB is negative and V_CD is positive.
• Since primary side V_AB is negative and i_L is positive, diodes (D_S3, D_S4) do conduct in primary side.
• Since secondary side V_CD and i_L are positive, diodes (D_Q1, D_Q2) do conduct in secondary side.
• This stage ends when the inductor current reaches zero from positive.

Interval-7 (t₆ – t₇)

• The gate signals (S₃, S₄) and (Q₁, Q₂) are still available. Hence, V_AB is negative and V_CD is positive.
• Since primary side V_AB and i_L are negative, switches (S₃, S₄) do conduct in primary side.
• Since secondary side V_CD is positive and i_L is negative, switches (Q₁, Q₂) do conduct in secondary side.
• This stage ends when the inductor current reaches negative from zero.

Interval-8 (t₇ – t₈)

• The gate signals (S₃, S₄) are available and all switches in secondary are in off state. Hence, V_AB is negative and V_CD is zero. This period can be called secondary bridge dead-band region.
• Since primary side V_AB and i_L are negative, switches (S₃, S₄) do conduct in primary side.
• Since secondary V_CD is zero and i_L is negative, energy stored inductor circulates currents in same direction, hence, that discharges the switch capacitors (C_Q3, C_Q4) to 0 (i.e. V_o -> 0) and charges the switch capacitors (C_Q1, C_Q2) to V_o (i.e. 0 -> V_o). Therefore, secondary voltage V_CD changes from +V_o -> -V_o.
• This stage ends when the inductor current charges and discharges the secondary bridge switch capacitors fully.

Interval-9 (t₈ – t₉)

• The gate signals (S₃, S₄) and (Q₃, Q₄) are available. Hence, V_AB is negative and V_CD is negative.
• Since primary side both V_AB and i_L are negative, switches (S₃, S₄) do conduct in primary side.
• Since secondary side V_CD and i_L are negative, diodes (D_Q3, D_Q4) do conduct in secondary side.
• This stage ends when the primary bridge gating signals are removed.

Interval-10 (t₉ – T_s)

• The gate signals (Q₃, Q₄) are available and all switches in primary are in off state. Hence, V_AB is zero and V_CD is negative. This period can be called primary bridge dead-band region.
• Since primary voltage V_AB is zero and i_L is negative, energy stored inductor circulates current in same direction, hence that discharges the capacitors (C_S1, C_S2) to 0 (i.e. V_s -> 0) and charges the capacitors (C_S3, C_S4) to V_s (i.e. 0 -> V_s). Therefore, primary voltage V_AB changes from -V_s -> +V_s.
• Since secondary side V_CD and i_L are negative, diodes (D_Q3, D_Q4) do conduct in secondary side.
• This stage ends when the inductor current charges and discharges the primary bridge switch capacitors fully.